Design of Static Random-Access Memory Cell for Fault Tolerant Digital System

This paper comparatively analyzes the static random-access memory (SRAM) cell designs for fault tolerance. Since SRAM cells are sensitive to radiation-induced single event upsets, various circuit-level approaches have been applied. Compared conventional circuits, one possibility is adding redundant storage nodes by means of additional transistors. The strength and weakness in terms performance aspects—speed, area, power, stability, tolerance, etc.—according design compared analytically discussed. discussion concludes that, future, it paramount develop an with a mitigated trade-off between read/write SEU